怎么用VHDL语言编写数码管的动态显示

如何用VHDL语言编写数码管的动态显示
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;

entity led is
port(
clk:in std_logic;
wx:out std_logic_vector(7 downto 0);
dx:out std_logic_vector(6 downto 0));
end led;

architecture one of led is
signal cnt,cnt2:integer:= 0;
--signal count:std_logic(2 downto 0);
begin
process(clk)
begin
if clk'event and clk = '1' then
cnt <= cnt+1;
if cnt = 50000 then
cnt2 <= cnt2+1;
if cnt2 = 1000 then
wx <= "11111110";
dx <= "0000001";
elsif cnt2 = 2000 then
wx <= "11111110";
dx <= "1001111";
elsif cnt2 = 3000 then
wx <= "11111110";
dx <= "0010010";
elsif cnt2 = 4000 then
wx <= "11111110";
dx <= "0000110";
elsif cnt2 = 5000 then
wx <= "11111110";
dx <= "1001100";
elsif cnt2 = 6000 then
wx <= "11111110";
dx <= "0100100";
elsif cnt2 = 7000 then
wx <= "11111110";
dx <= "0100000";
elsif cnt2 = 8000 then
wx <= "11111110";
dx <= "0001111";
elsif cnt2 = 9000 then
wx <= "11111110";
dx <= "0000000";
elsif cnt2 = 10000 then
wx <= "11111110";
dx <= "0000100";
cnt2 <= 0;
end if;
  elsif cnt = 100000 then
cnt2 <= cnt2+1;
if cnt2 = 1000 then
wx <= "11111101";
dx <= "0010010";
elsif cnt2 = 2000 then
wx <= "11111101";
dx <= "0000001";
elsif cnt2 = 3000 then
wx <= "11111101";
dx <= "1001111";
elsif cnt2 = 4000 then
wx <= "11111101";
dx <= "0100100";
elsif cnt2 = 5000 then
wx <= "11111101";
dx <= "0000110";
elsif cnt2 = 6000 then
wx <= "11111101";
dx <= "0001111";
elsif cnt2 = 7000 then
wx <= "11111101";
dx <= "1001100";
elsif cnt2 = 8000 then
wx <= "11111101";
dx <= "0100000";
elsif cnt2 = 9000 then
wx <= "11111101";
dx <= "0000000";
cnt2 <= 0;
end if;
cnt <= 0;
end if;

end if;
end process;
end one;
这是我的程序，但是要等到第一个管亮后，第二个管才亮，而且第二个管亮时，第一个管又不亮了！！应该怎么修改，忘路过的高人指点指点！！谢谢1！

------解决方案--------------------
这是我写的一个8位数码管动态显示的例子可以看一下。
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;

entity led_move is
port(clk : in std_logic; --输入时钟50Mh
reset: in std_logic; --复位
post: out std_logic_vector(7 downto 0); --位选输出
part: out std_logic_vector(7 downto 0)); --段选输出
end led_move;

architecture behave of led_move is
signal count :integer range 0 to 250000;
--signal count1 :integer range 0 to 99999999;
signal clk2 :std_logic; 
signal s0,s1,s2,s3,s4,s5,s6,s7 :integer range 0 to 9; --状态控制信号
type state2 is(g,s,b,q,w,sw,bw,qw);
signal part_state:state2:=g;
type play is array (0 to 9)of std_logic_vector(7 downto 0);
--led显示字符码0 1 2 3 4 5 6 7 8 9
constant a:play:=("00111111","00000110","01011011","01001111","01100110","01101101","01111101","00000111","01111111","01101111");